The hottest new lap counting and timing system for

MSP430 based new long-distance race lap counting and timing system

o introduction

in daily physical fitness testing, the timing performance of an individual's long-distance race is an important data to reflect the individual's physical quality. Traditionally, long-distance race testing mainly relies on manual lap counting and timing, which is time-consuming and laborious, and the statistical data is easily disturbed by subjective factors, which will affect the fairness and effectiveness of the test or competition. Therefore, the traditional data statistics method of manual timing and lap counting is not suitable for formal testing. The application of this system can automatically count the long-distance running results of a large number of people, saving people and effort. The testee carries an automatic lap counting device with him to start timing at the start and stop timing at the end, so as to realize the purpose of automatic timing and reduce the number of testers

this system is composed of two masters and multiple slaves (1 ~ 150). The master is responsible for sending laps and starting instructions, and the slave receives the command of the master and realizes the function of automatic lap timing and counting. The main processing core of the whole system is MSP430. This microcontroller is a series of 16 bit ultra-low power MCU launched by TI company, with 16 bit RISC structure, 125 s instruction cycle and 12 bit 200 KB/s a/d converter. Msp430fe425 in its series is the core of the system slave. It provides segmented LCD driver and hardware serial interface, which greatly reduces the difficulty of developing the system slave; MSP430F149 in this series is the core of the host of this system because it has hardware serial interface and rich i/o interface. The whole system has small power consumption, compact structure and reasonable cost, and has great market promotion value

1 system overview

the new long-distance running timing and counting system is composed of master and slave. The host machine can send the number of laps, starting instructions and passing instructions that the tester wants to run, and the slave machine can receive the number of laps, display the timing results and laps in real time, and stop timing after running the set number of laps. In practical application, host 1 is placed at the beginning of the runway, and host 2 is placed at the end of the runway, as shown in Figure 1

before the test, the tester must wear the slave device of the system. When the tester reaches the starting point of the runway, turn on the slave switch of the system, and the master sends it to all slaves to the project department and the asset manager to check the number of turns (the minimum unit of this value is 0.5), and the slave receives the number of turns and displays it on the LCD screen. At the start, the master sends timing instructions to all slaves, and the slaves start timing after receiving the instructions; After that, only when the tester passes the host one or two alternately, the number of turns will be reduced by 0.5 for each time he passes the host. When the number of laps is reduced to zero, the timing stops, and the test time of the tester (that is, the time spent running over the above number of laps) will be displayed on the LCD screen. The overall workflow of the system is shown in Figure 2

2 hardware structure of the system

the master and slave of the system use MSP430 single chip microcomputer as the master processor. Although this series of single chip microcomputer has not been launched for a long time, due to its excellent performance, it has been widely used in the market for several years, and has become an upgraded substitute of 51 series single chip microcomputer. Its following characteristics are highly praised by the academic community

the power supply voltage of ultra-low power MSP430 Series MCU is between 1.8 ~ 3.3 V, the current is only 0.1 A in RAM data holding mode, the power consumption is 250 a/mips (MIPs: instructions per million) in active state, and the maximum leakage current of the input port of i/o port is not more than 50 na. Powerful processing power MSP430 single chip microcomputer adopts the reduced instruction set (RTIs) structure, and one instruction can be executed in one clock cycle, so that when MSP430 works in 8MHz crystal oscillator, the instruction speed can reach 8 MIPS according to the preliminary agreement. Rich on-chip peripherals module MSP430 single chip microcomputer integrates rich on-chip peripherals. Different types of single chip microcomputer integrate different peripherals. The basic combination includes the following functional modules: watchdog circuit (WDT), timer a (timer_a), timer B, basic timer, serial port circuit, hardware multiplier, 10 bit a/D conversion circuit (12/14 B ADC) and 10 bit a/D conversion circuit (12/14 B DAC), etc

in this system, the master adopts MSP430F149 and the slave adopts msp430fe425. The hardware block diagram of the system host is shown in Figure 3

the host uses 3.7 V lithium-ion rechargeable battery for power supply, which is stabilized to 3.3 V by the voltage stabilizing circuit to supply power to MSP430F149 single chip microcomputer, and is boosted to 5 V by the voltage boosting circuit to supply power to the wireless transmission module and dot matrix LCD; The lattice liquid crystal adopts domestic topway3033 liquid crystal with a display resolution of 12864. The liquid crystal has its own Chinese character library. Its eight data lines are connected to the P2 port of the single chip microcomputer, and three control lines are connected to the P3.0 ~ p3.2 ports respectively; The 8-key keyboard is connected with the P1 port of the single chip microcomputer to complete the input function of data and instructions. The wireless module is connected with the hardware serial port circuit of the single chip microcomputer to realize the transmission of information from the serial port to the single chip microcomputer of the slave machine. In order to reduce the cost, the LCD screen and keyboard are removed and replaced by an indicator light. When the indicator light flashes, it means that the host 2 is working normally. When the indicator light is off, it means that the host 2 is working abnormally or does not work

the hardware frame of the system slave can not only protect the building structure, as shown in Figure 4. The slave uses 3.7 V lithium-ion rechargeable battery to supply power, which is stabilized to 3.3 V through the voltage stabilizing circuit to supply power to msp430fe425 single chip microcomputer and wireless receiving module. The display module adopts 7-bit Segment LCD, which fully meets the needs of data display. The wireless module is connected with the hardware serial port circuit of 430 single chip microcomputer to realize the transmission of received data to the single chip microcomputer. The system slave is small in size and light in weight, which is suitable for testers to carry around

3 system software design

the software of this system is written in C language, which takes into account the characteristics of general high-level language and assembly language. It not only has good program readability, but also supports the hardware operation of the processor to be developed

the software of this system is designed in a modular way to facilitate future system maintenance and upgrading. The software mainly includes LCD driver module, serial driver module, communication module and main program. The software flow of master and slave is shown in Figure 5

after the host is initialized, prompt the input of the number of timed laps on the LCD screen, and then this is the fourth largest single investment of the company. Enter the number of laps to run with the keyboard, press the confirm key, and the host starts to send the number of counted laps to the slave. When the testers start after receiving the laps, the staff press the start button, and then the host sends the timing instruction. Then send a specific character until the end of this test

after the slave is initialized, it is ready to receive the number of timing turns. When the number of timing turns is received, the information of the number of turns is displayed on the LCD screen. When the slave receives the timing instruction, the slave starts timing and displays the timing on the LCD screen. When the slave receives the signal sent by the host 1, it will mark the position 1. When the slave receives the signal sent by the host 2, it will mark the position 0; When the slave receives the signal sent by any host, first judge whether it is host one or host two, and then judge whether it is the same as the host that sent the signal last. If it is different, the number of turns will be halved; if it is different, the number of turns will remain; Then check whether the number of turns is zero. If it is not zero, continue counting. If it is zero, the counting stops

4 conclusion

this system has been successfully applied in the national defense daily ability assessment of Xi'an University of Electronic Science and technology. The system has small slave size, low power consumption, convenient for testers to test and carry. At the same time, the system has the characteristics of high timing accuracy, timeliness and convenience, labor-saving and so on. It has a wide application prospect in the usual physical fitness assessment and measurement and other corresponding occasions